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SafeMedia offers three versions of its Clouseau®
appliance at three different price/performance levels. All three versions benefit from
the latest System-on-Chip (SoC) technology to reduce board-level chip count and leverage
specialized hardware optimizations. Clouseau® uses
SoC architecture with control, data, and acceleration functions on the same chip substrate
with both shared and low-latency access, thus achieving near wire-speed performance.
Clouseau® 10: This is an entry-level system priced for home and other low
bandwidth applications with 100Mbit (10/100 Ethernet) networks. It delivers up to 30,000
packet inspections per second using basic configuration on integrated, less accelerated
hardware, to deliver solid performance at an aggressive low price.
Clouseau® 500: This mid-level system handles 1-2 Gigabit (10/100/1000) Ethernet
lines, with inspection rates up to 500,000 packets per second. It uses multi-core SoC
with hardware accelerated inspection and I/O to deliver high throughput and low latency.
Pricing and performance for this system is appropriate for use on subnets within small
to medium institutions.
Clouseau® 1000: Clouseau®’s high-level system handles up to 3 million
packets per second where 10 Gigabit network throughputs are required. It uses more on-chip
cores and co-processor acceleration blocks to meet this high performance mark. This system
is designed for use within large organizations and institutions, such as universities and
large corporations.
SafeMedia Clouseau®® uses state of the art
hardware with the following features:
- High-performance architecture with four to twelve cnMIPS processor cores.
- Hardware packet processing acceleration.
- Hardware workqueueing, scheduling, ordering, and synchronization.
- TCP acceleration, including checksum and time.
- Integrated packet interface.
- High-bandwidth on chip-memory system including a 512KB four-way L2 cache.
- Fully coherent memory system.
- 72-bit DDR2 DRAM interface 800MHz.
- Low-latency DRAM interfaces for fast string-matching.
- Secure on-chip key memory.
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